Located in Northern California, the team at Joby Aviation is driven by our goal of creating an affordable, all-electric air transportation system. Imagine a piloted air taxi that takes off vertically, then quietly carries you and your fellow passengers over the congested city streets below, enabling you to spend more time with the people and places that matter most. Since 2009, our team has worked steadily to make this dream a reality. We’ve designed and tested many generations of prototype aircraft capable of serving in a network of electric air taxis. We’re looking for talented, committed individuals to join our team as we push onwards toward certifying the Joby aircraft with the Federal Aviation Administration, scaling our manufacturing, and launching our initial commercial service.
We are looking FPGA/ASIC Verification Engineer preferably with (UVM) skills to join our small team that
is responsible for helping to bring the dream of Urban Air Mobility to market. They will work with the Joby FPGA Team to verify FPGA design functionality in preparation to the FAA Certification process for Airborne Electronic Hardware.
You will be responsible for writing test plans from module description documents and for writing test benches that implement the test plans. You will work closely with the FPGA engineers during the planning, requirements, design, test and integration phases.
Responsibilities
The successful candidate will assist the team in:
- Design, develop and maintain UVM testbenches
- Create and review test plan documents
- Contribute to requirements specifications
- Participate in module and system-level design reviews
Required
- B.S. in Computer Science, Electrical Engineering or related field and 1 year of practical experience or an advanced degree and demonstratable RTL Verification Experience.
- Knowledge of Verilog/SystemVerilog
- Familiarity with development in a Linux environment
- Willingness and ability to learn new tools and methodologies
Desired
- Experience with one or more scripting languages such as Tcl, Python, or Perl
- Experience with object-oriented programming
- Experience with FPGAs and FPGA tools, preferably Xilinx Vivado
- Experience with UVM
- Experience with DO-254
- Experience with test-driven design
EEO
Please still apply if you don’t meet all items in the desired section! Studies have shown that women and people of color are less likely to apply to jobs unless they meet every single qualification. We are dedicated to building a diverse and effective workplace, so if you’re excited about this role but your experience doesn’t align perfectly with every qualification, we encourage you to apply anyway. You may be just the right candidate for this or other roles.
Compensation at Joby is a combination of base pay and Restricted Stock Units (RSUs). The target base pay for this position is $72,300 - $118,500/yr. The compensation package offered will be determined by location, job-related knowledge, skills, and experience.
Joby also offers a comprehensive benefits package, including paid time off, healthcare benefits, a 401(k) plan with a company match, an employee stock purchase plan (ESPP), short-term and long-term disability coverage, life insurance, and more
Joby is an Equal Opportunity Employer.
